// Canonical non-inverting gain stage using the verified generic op-amp model.
net GND
net VCC
net VEE
net IN
net FB
net OUT
source VP 12V
source VN 12V
source VIN sine_ac(0V,500mV,1kHz,1V)
opamp U1 KESSETSU_OPAMP_V1
resistor RF 9k
resistor RG 1k
resistor RL 10k
connect VP.minus to GND
connect VP.plus to VCC
connect VN.plus to GND
connect VN.minus to VEE
connect VIN.minus to GND
connect VIN.plus to IN
connect U1.in_p to IN
connect U1.in_n to FB
connect U1.vcc to VCC
connect U1.vee to VEE
connect U1.out to OUT
connect RF.p1 to OUT
connect RF.p2 to FB
connect RG.p1 to FB
connect RG.p2 to GND
connect RL.p1 to OUT
connect RL.p2 to GND
simulate op
simulate ac dec 30 10Hz 10MHz
simulate tran 10us 5ms
assert value(V(OUT)) > -1mV
assert value(V(OUT)) < 1mV
assert gain(V(OUT),V(IN)) > 9.9
assert gain(V(OUT),V(IN)) < 10.1
assert bandwidth(V(OUT),V(IN)) > 90kHz
assert bandwidth(V(OUT),V(IN)) < 110kHz
assert clipping(V(OUT),-11V,11V) < 0.1%